In this course, digital design is taught at a higher level of abstraction than BEE1213. It provides an in-depth coverage of systematic development and synthesis of digital system with emphasis on Field Programmable Gate Array (FPGA) technology. It covers with the proper planning techniques, design strategy and tools, functional verification and system implementation. The information gained can be applied to any digital design by using a top-down synthesis design approach. Through this course, student will be able to create digital design faster, shorten development time and lower the development costs.
Learning Outcomes
1. Apply knowledge of digital electronic to realize the combinational logic system, arithmetic circuit and finite state machine using different technologies.
2. Design digital electronic system using combinational logic, arithmetic circuit and finite state machine (FSM) for various applications.
3. Construct digital electronic system using Hardware Description Language (HDL) and implement the system on FPGA.
4. Apply ethical principles and commit to
responsibilities and norms of engineering practice in learning activities.
Lesson Plan
| Chapters |
Lecture Notes |
|
Chap1 Introduction to Digital Electronics Systems |
|
| Chap2
Project Planning & Design Tools |
chap2 |
|
Chap3 Introduction to HDL |
notes_a notes_b notes_c notes_d notes_e notes_f |
|
Chap4
Arithmetic Circuits |
notes |
|
Chap5 Finite State Machines (FSM) Chap6 Multi-Input Multi-Output State Machines FPGA Implementation of Digital Systems |
notes sample Q's |
Assessments
|
Evaluation |
|
| Assignment / Laboratory | 15 % |
| Project | 15 % |
| Test | 30 % |
| Final Examination | 40 % |
|
Xilinx Tutorial |
|
| Xilinx ISE download centre | link |
| Download and installation steps for Xilinx ISE | link |
|
Xilinx Video |
| Design Entry - Schematic |
| Simulation Procedure |
| Design Entry - VHDL |
| FPGA Programming |
|
Laboratory Assessment |
|
|
Lab1 (5%) |
|
|
Lab2 (7%) |
|
|
Lab3 (8%) |
|