This course provides an introduction to the principles and methodologies of front-end integrated circuit (IC) design. Students will gain hands-on experience using the Altera DE10-Lite FPGA board, applying theoretical knowledge to practical applications through lab assignments. The course begins with an Introduction to Front-End IC Design, covering the IC design flow, and design specifications. Students will explore Hardware Description Languages (HDL), focusing on Verilog and VHDL, different modeling techniques, and testbench development for design verification. Key topics include Register Transfer Level (RTL) Design, design finite state machines (FSMs), and develop RTL-based projects. The course also covers Functional Analysis and Synthesis, introducing synthesis tools, optimization strategies, and logic synthesis techniques for mapping RTL to gate-level representations. The course concludes with a section on Code Quality and Design Optimization, addressing HDL coding standards, linting tools, design for testability (DFT), and best practices for readability and modularity. Through a combination of lectures, hands-on labs, and project-based learning, students will develop the necessary skills to design, verify, and optimize digital systems using industry-standard tools and methodologies.
Learning Outcomes
Apply Hardware Description Languages (HDL) to design, simulate, and verify digital circuits at the Register Transfer Level (RTL). MicroCredential 1: Fundamentals of IC and HDL Design.
Analyze digital system performance using functional synthesis, static timing analysis (STA), and optimization techniques. Microcredential 2: RTL Design and Synthesis (C5)
Develop and implement FPGA-based digital designs using the Altera DE10-Lite board, adhering to industry best practices for code quality and testability. MicroCredential 3: Timing Analysis and Design Optimization (A4).
Develop ethical solutions in Digital System Design.
Lesson Plan
| Chapters |
Lecture Notes |
|
Class Introduction Video |
Course Introduction & Overview of IC Design Flow |
| Micro Credential 1 Fundamentals of IC and HDL Design. Video |
MC 1a - Design Specifications, Tools, and Historical Perspective (PLA, PAL, PLD) MC 1b - Introduction to HDL (Verilog/VHDL) MC 1c - HDL Modeling: Structural, Behavioral, and Dataflow MC 1d - Testbenches and Simulation for Design Verification |
|
Micro Credential 2 RTL Design and Synthesis |
MC 2a - RTL Design: Combinational and Sequential Circuits MC 2b - RTL Coding Best Practices & FSM Design MC 2c - Functional Simulation and Verification Strategies MC 2d - Logic Synthesis: Mapping RTL to Gate-Level |
| Micro Credential 3 Timing Analysis and Design Optimization |
MC 3a - Static Timing Analysis (STA) and Timing Constraints MC 3b - Timing Violation Analysis and Optimization Techniques MC 3c - Code Quality, Linting Tools, and Design for Testability (DFT) |
| Project Based Learning Digital Systems Design |
|
| Innovative Teaching / Guest Lecture |
Global Classroom - Universit, blog Global Classroom - t Universitas blog Integrating Gallery Walk and Reciprocal Teaching blog |
Assessments
|
Evaluation |
|
| Quiz | 10 % |
| Midterm Test | 20 % |
| Project | 20 % |
| Final Examination | 50 % |
|
Laboratory Resources |
|
| Quartus Download Center | link |
| Introduction to DE10 Lite | link |
| FPGA Simulation with Modelsim | link |
|
Additional Youtube Link (TBU) |
| Playlist |
| Slider Game in Python |
| Rasp Pi |
|
Laboratory / Assessment |
|
Text Book
1. Digital Systems Design Using Verilog, Charles Roth, Lizy K. John, and Byeong Kil Lee, ISBN-13: 978-1285051079
2. Digital System Design with FPGA: Implementation Using Verilog and VHDL, Bora Tar and Nurhan Karabey, ISBN-13: 978-1259837906
3. FPGA Prototyping by Verilog Examples: Xilinx Spartan-3 Version, Pong P. Chu, ISBN-13: 978-0470185315
4. Advanced Digital Design with the Verilog HDL, Michael D. Ciletti, ISBN-13: 978-0136019282
5. Digital Design and Computer Architecture, David Harris and Sarah Harris, ISBN-13: 978-01239442451. <
6. Noordin N.H, Phuah S. E. (2025), First Guide Digital System Design,
Penerbit UMP.
7. The internet :)